-----BEGIN PGP SIGNED MESSAGE----- To: cypherpunks@toad.com Date: Wed Jul 24 16:31:44 1996 Has anyone thought about TI or Motorolas DSP-Eval-Boards (at 99$ a piece at 40 MHz with optimized assembler they might easily outrun a PPro200) Don't look at me that way, I know only little about DSP-Programming. By the way, using FPGA's (as suggested earlier) at around 100 MHz should be extremely fast (after all, on one 100000 Gate FPGA, one should be able to do lot of parallel things at one clock cycle -> test several keys at once...). I estimate, that at reasonable cost (lets say, <$500) you should be able to put enough FPGAs on a board to do enough keys in parallel to equal 1 key per cycle, i.e. 1e8 keys/sec. That would amount to: 7.2e8 secs ->8340 days If you build 100 such machines you win in 3 months (without any of the mentioned optimisations (2e55 instead of 2e56, etc.) - --------< fate favors the prepared mind >-------- Remo Pini rp@rpini.com PGP: http://www.rpini.com/remopini/rpcrypto.html - ------< words are what reality is made of >------ -----BEGIN PGP SIGNATURE----- Version: 2.6.3i Charset: noconv iQEVAwUBMfYz0RFhy5sz+bTpAQGj0Af/Xto3KiZMxb4zybeRcGK3mOINTmgiBo3i Ewbzk5V0DRmNU0j6a1GFh0hmPnHwAZoopLr0VjdiBYRKCj73AEp2FHNuWxhRdp33 KKa4qfWATJM3ESGRpNTfTQr/ruCzxbkGTtDki/j0HC4UbRi/fdjy6MinstjaIJ3t eIcX18+SKOxmV+hzZ8qrJeHlEI3e2RPl0YscXSnHVGlHZNOFUiJB/jPz/Gs8ph9i aZR6bv+T8UVC36CzFF/B9Syxr6QFXVM5xcZ9tAui6VyAk7GOd/O5AKG8Z51jO+OK Nf77HxT3g3wovPz/9pC+6yr9haaokBYPDs4YrBNKA8Wtln2HgdTr3w== =OjX2 -----END PGP SIGNATURE-----