I thought I saw the clk voltage go to zero after repowering the board,
   and began diagnosing based on this.
   However, I'm unable to reproduce the behavior.
   I downloaded the main firmware off the device and used avrdude to
   verify the resulting binary was identical to what I had uploaded.
   It also has serial firmware, separate from the mcu firmware.
   The clk pin presently appears to go high as soon as the board is
   powered. I checked the source and that is correct. When I disabled it,
   I found the pin to oscillate on its own, while the board was
   theoretically waiting for instructions from the computer.
   I checked my test code and it looks right enough:
   CLK_DDR |= _BV(CLK); // output on pin
   CLK_PORT &= ~_BV(CLK); // set it low
   I added a while(1); after those lines and the clock stays low
   correctly.
   Looks like there's something else the chip does that my test code
   didn't account for.
   I commented out all code in the run loop after the debug terminal. The
   pin stays low on boot now, but oscillates after the voltage test.
   Gotta just spend some time troubleshooting and learning it.