[semi-spam] sdr struggles continue

Karl gmkarl at gmail.com
Sat May 22 16:36:11 PDT 2021

> > the reason FPGA's are so common, particularly in TX scenarios
> > is that time constraints for low level protocols are extremely

I thought about this a little more and I'm obviously in the wrong.  People
want high sample rates, and that means more data than you can send over a
bus to do anything at the same rate it's being sent.

it's kind of you to translate with me a little.
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