Tim May's Passing Confirmed
jdb10987 at yahoo.com
Sun Dec 16 17:29:26 PST 2018
Maybe I should risk adding something about soft errors, which has some current relevance.Another way that the problem with alpha-particle-induced soft errors was by changing the semiconductor process for DRAMs from NMOS to CMOS. See the diagram for an NMOS DRAM cell. https://en.wikipedia.org/wiki/Dynamic_random-access_memory
An inherent part of the CMOS process is having a layer of opposite polarity just below the active components. When an alpha particle strikes the substrate of an NMOS chip, the resulting cloud of electrons get swept into the bit-cells. In a CMOS DRAM, the cloud of electrons is driven away from the bit cells, generally immunizing them against such upsets. So, my understanding is that alpha-induced soft-errors are generally no longer a threat.
The current relevance is that: While there hasn't been a reference to it recently on the Cypherpunks list, there is a technique called "row-hammer", https://en.wikipedia.org/wiki/Row_hammer which intends to take advantage of a slight weakness in some DRAMs such that repeatedly accessing rows physically near a desired row might cause bits in that nearby row to 'flip', or change state. While I don't claim to understand the details in the software, if this 'works' software running in a microcomputer can spy on what other software processes are doing, when there should be no such ability.
This is a tricky weakness. Ideally, you should be able to buy DRAMs which are entirely protected against 'row-hammer', but it's not easily known what designs (manufacturer's products) are weak. One possible protection, I think, is if computers have parity-bits available, and automatically checked, when DRAM computer memories are accessed. Parity DRAM memory used to be common, decades ago, but not so much anymore. This, I think, is a major mistake.
See the Row Hammer article, under the section "Mitigation".
"Since the release of Ivy Bridge microarchitecture, Intel Xeon processors support the so-called pseudo target row refresh (pTRR) that can be used in combination with pTRR-compliant DDR3 dual in-line memory modules (DIMMs) to mitigate the row hammer effect by automatically refreshing possible victim rows, with no negative impact on performance or power consumption. When used with DIMMs that are not pTRR-compliant, these Xeon processors by default fall back on performing DRAM refreshes at twice the usual frequency, which results in slightly higher memory access latency and may reduce the memory bandwidth by up to 2–4%."[end of partial quote]
On Saturday, December 15, 2018, 1:19:08 PM PST, John Young <jya at pipeline.com> wrote:
Excllent post, Jim, thanks.
At 02:47 PM 12/15/2018, you wrote:
>Tim May was very well-known in the 1979-era for his discovery that
>alpha particles (helium nuclei) caused data-read errors in
>then-current technology DRAMs.
>(An article from the last year or two incorrectly stated that we
>met; I think that was simply a misinterpretation of the fact that I
>also worked for Intel during 1980-82. But, I worked in Oregon,
>Aloha-3 specifically; I believe May worked in Santa Clara. I never
>visited any Intel locations outside Oregon; I do not recall that Tim
>May ever visited Oregon.)
>One of the very minor things I did while working at Intel involved
>Kapton (polyimide) 'shims' that were being experimented with to
>protect against such errors caused by alpha particles. A
>rectangular sheet of very thin plastic was attached over the DRAM
>chip. Due to the very-low penetration characteristic of alphas,
>this was plenty to stop them from striking the surface of the
>chip. As part of the development and evaluation process, it was
>occasionally necessary to remove those shims from assembled devices.
>Peeling them off frequently destroyed the chip: I used a tiny part
>of my Chemistry knowledge to recommend the use of the solvent, DMF
>(dimethyl formamide) to assist in this removal process, in a way
>which did not risk damage to the chip itself.
>The reason Intel had the problem of alpha particles was its heavy
>use of "cerdip" packages.
>for "ceramic dual inline package") Cerdip looks vaguely like an
>Oreo cookie, with two ceramic plates attached with a glass
>'glue'. That ceramic had tiny amounts of radioactive elements in
>it; not a lot, but it didn't take much to produce a significant
>amount of alphas. Cerdip was used because it achieved a hermetic
>seal, but it was cheaper than a different kind of ceramic
>Had they packaged their DRAMs in plastic, that would have been a
>vast improvement, actually virtually eliminating the
>problem: Production of plastics go through chemical processes where
>their components (monomers) are distilled, and so they contain
>virtually no radioactive atoms. But they couldn't immediately shift
>to using plastic packaging, because such packages were not
>hermetically sealed: Packaged in plastic, water from the
>environment eventually found its way to the chip itself. The
>problem with that is that this water slowly reacted with one
>component of the glass, phosphorus-containing 'pyroglass'. (a
>related material was 'pyrox') These phosphorus glasses slowly
>reacted with that moisture to generate phosphoric acid, and in turn
>that slowly corroded the very thin aluminum conductors making up
>interconnects in that chip.
>Fixing the problem caused by alpha particles eventually required
>changing the chip process so that it didn't require hermetic
>packaging, making plastic packaging workable.
> Jim Bell
>On Saturday, December 15, 2018, 10:44:21 AM PST, John Young
><jya at pipeline.com> wrote:
>This confirms Tim May's passing, by long-time cpunk, Lucky Green
>Dear Friends, It is with sadness that news reaches me of the passing
>of my dear friend Tim May - Cypherpunks co-Founder, Discoverer of
>Radiation-Induced Single Even Upsets in Integrated Circuits, and
>Uncompromising Firearms Proponent: Tweet:
>Astra, Tim! --Lucky
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