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[The Doctor]

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On 07/29/2015 11:07 AM, Riad S. Wahby wrote:

> But that just gives away the bitstream describing the FPGA 
> configuration (say, a trusted CPU). Is the CPU's *design* a secret?
> If

Gate matrices can be reversed (as mentioned earlier).

> not, I don't see why it matters that an evil cleaner might read out
> the FPGA's configuration. (Obviously, don't store secret keys in
> there!)

I thought the point being made in the conversation was (and correct me
if I'm wrong) that one could dump an arbitrary FPGA's contents to do a
security audit on them.

Not to say that you're wrong, you make a good point, but it's taking
the discussion in a different direction.

> If we really are worried about keeping the CPU's design a secret,
> it's

We were talking about open CPU designs, so why keep them a secret?

> possible with many FPGAs to encrypt the configuration bitstream
> such that the configuration is decrypted onboard the FPGA at
> power-on. This

Yeah.  It's pretty cool, isn't it?

> is intended to handle the case where I want to sell a product that
> uses an FPGA without revealing the contents of that FPGA's
> configuration to my customers or competitors.

That's a few degrees off-center from where the discussion was going,
but go ahead.  We'll fork() as necessary.

> Cue the OTP / epoxy / physical security arms race, I guess.

Or the electromechanical processing rigs that a few people have been
bringing up over beer lately.  Cool idea, but I strongly doubt that
they'll scale, or even keep up with the watch on my wrist.

- -- 
The Doctor [412/724/301/703/415] [ZS]

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"The world is not a match for you and me/No matter what we used to
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