On Thu, Mar 12, 2020 at 07:16:45PM +0000, jim bell wrote:
> Jim Bell's comments interspersed:
[snip]
>
https://www.vusec.net/projects/trrespass/>
>> It is quite possible that my isotopic dielectric invention will greatly improve performance in the area of resisting rowhammer. One major figure-of-merit in the DRAM chip design is the ratio of the bit-cell capacitance to the bit-line capacitance: bigger is better. The way a DRAM bit line works is that it is connected many hundreds of bit-cells, gated by row-address lines. Initially, the bit line is fully charged, and then the row address is turned on, shorting the specific bit-cell to the bit-line.
>> There may be many hundreds of bit-cells potentially connected to a given bit-line, but of course only one at a time. So, if the bitline is charged to, say, 3.0 volts, and the bit-cell is also charged to 3 volts, doing that connection changes little. But if the bit-cell is charged to 0 volts, doing that connection drops the bit-line voltage slightly. This voltage difference is amplified during the read cycle, and then written back into the cell at the end of the cycle,
>> What is needed is an increase in capacitance of the bit-cell, and a decrease in the capacitance of the bit-line. My invention can do both.
>I thought that invention was supposed to be applicable to fibre-optic cable extrusion somehow.
Perhaps it will be reduced as far as 0.001 dB/kilometer: If it gets as low as 0.003 dB/kilometer, it will be possible to transmit from New York to Ireland (5000 kilometers) under the sea with NO EDFA
https://en.wikipedia.org/wiki/Optical_amplifier amplifiers or repeaters. Currently fibers take about 40 EDFA amplifiers to go that distance.
Isotope-Modified Dielectric
I have applied for a second patent on isotope-substitution of atoms in semiconductors and dielectrics. (The latter, materials used to form capacitors, such as bit-cells and bit-lines.)
https://daltonium.com/
> Can you explain how your invention can be applied to the semi-conductor fabrication process on an IC (which I understand only extremely minimally as layers of materials, at least one layer of some sort of silicon and another layer of some sort of conductor, and using acid or lasers to etch away a pattern in the top layer.
Between a transistor's gate electrode (originally, 1960's and 1970's) a metal such as aluminum, then for many years silicon, now I think it's typically a metal again) is an electrically-non-conducting material, an insulator, that had a characteristic dielectric constant. Until 2007 it was usually silica (SiO2), with a dielectric constant of about 3.9 (vacuum D.C. is 1.0000; air is about 1.0005) but by that year the the minimum thickness got so small (1.2 nanometers) that quantum effects allow electricity to 'leak' through that insulator, wasting about 1 amp per square centimeter of chip area. See 'quantum tunnelling'.
https://en.wikipedia.org/wiki/Quantum_tunnelling This can become extremely wasteful, especially in battery-operated devices such as smartphones.
During this time, 2007, the minimum feature size was about 65 nanometer; today it is around 10 nanometer.
What the industry needed was a material with a higher D.C. to allow use of a thicker gate layer. They got it by using various compounds of the element Hafnium, which had D.C.' of between 16 and 24. Google 'transistor hafnium' for much more detail. Or:
But today, they have 'run out of gas' yet again. My solution is the substitution of isotopes of the elements which currently make up those dielectrics. I can't say much more at this stage.
However, I CAN say that I have a very good use for about $120,000 to obtain patents for this invention in about 8 nations (one is the European Patent Cooperation Region.)
Due to the nature of the patent system, obtaining those patents 'locks up' the large majority of the world's IC market for this invention.
Further inventions and patents:
I have many other isotope-based inventions waiting to be patented, but I cannot disclose them, at least not until I file a Provisional Patent Application.
Jim Bell