4 Nov
2014
4 Nov
'14
7:57 p.m.
given interest in open source privacy enhancing technologies, what about open ASIC SoC for privacy routers and other hw? - 32bit RISC opencores. http://cdn.opencores.org/pdf/or1k-asic.pdf - TRNG series as native instruction; avalanche + RF + slow sampled from fast pair into aligned memory target as raw samples, each source tunable via MSR. http://www.cryptography.com/public/pdf/VIA_rng.pdf , http://moonbaseotago.com/onerng/ - Fab with chain of custody via domestic 22-nm foundry services. (Intel, other?) - Random quality and critical component validation with a FEI Versa 3D tear down , http://siliconexposed.blogspot.de/2014/03/getting-my-feet-wet-with-invasive_... what else required? (IOMMU isolation?)