this morning i got back on porting serialice, which lets you try firmware without reflashing the chip (and step through it). serialice is part of coreboot but has a .com main page: https://www.serialice.com/Main_Page . there's work in their issue repo to merge it into coreboot that needs a volunteer to clean it up and finish. so, i transferred my serialice work to the main system so i could test it without a working programmer. i laboriously added debugging and test statements to bisect it with known-working code. in the end, it turns it out _already works fine_. it just plain works, and i can debug my cpu with the cpu using what i already wrote. it is _incredibly easy_ to port a new board to serialice. all you need to do is initialise the cpu and the serial port, nothing else, not even the ram, and there is already code in serialice for common serial port cpus and cpu families. if you're a little familiar with assembler, you might be able to port a new board in a single day by disassembling the factory rom. the boot vector is 16 bytes prior to the end of the flash, and sometimes there is a southbridge vector 16 bytes prior to that. (at least that was how my old amd64 board is, and the code it uses is shared across many other boards). for me now, if i want to look at new bioses, the biggest impediment is gaining access to the flash chip. i dunno how to do that yet. anyway, with the logic analyser projects on the side to make the actual programmer work, next step for me with serialice is to see if my old build was actually working and my eyes were crossed, or if there is a reason it wasn't, to discern what the difference is, since the source code appears the same.