After I wrote that, I thought it is appropriate to expand my comment a little.

Modern silicon wafers are huge:  300 millimeters, or about 1 foot in diameter.  That's far larger than the 4-inch diameter that was common in 1980-2, when I worked at Intel.   Wafers can have a problem, referred to as "potato-chipping".  https://semiaccurate.com/2015/05/18/disco-makes-hexagonal-non-regular-chips-possible/      

It's difficult to lithograph semiconductor patterns on a wafer if this potato-chipping occurs.  So, the wafer must be physically thicker than they might otherwise like.  But when the lithographic and other steps are completed, the chips might be far thicker than they'd like to package,  Generally, the solution is called "back-grinding", and involves simply grinding the back side of the wafer to whatever thickness they actually want the chips to be.  Then, they plate on a thin layer of metal, designed to allow the chips to be soldered/brazed to a metal plate, and dice the thinned chips and bond them to a metal backing.

However, none of this explains the statement below that the chip's 'thin-ness' somehow reduces security.  

              Jim Bell