https://www.bleepingcomputer.com/news/hardware/researchers-point-out-theoret... http://amd-dev.wpengine.netdna-cdn.com/wordpress/media/2013/12/AMD_Memory_En... https://arxiv.org/pdf/1612.01119v1.pdf The security protocol that governs how virtual machines share data on a host system powered by AMD Zen processors has been found to be insecure, at least in theory, according to two German researchers. The technology, called Secure Encrypted Virtualization (SEV), is designed to encrypt parts of the memory shared by different virtual machines on cloud servers. AMD, who plans to ship SEV with its upcoming line of Zen processors, has published the technical documentation for the SEV technology this past April. The German researchers have analyzed the design of SEV, using this public documentation, and said they managed to identify three attack channels, which work, at least in theory. [In a technical paper released over the past weekend, the researchers described their attacks:] "We show how a malicious hypervisor can force the guest to perform arbitrary read and write operations on protected memory. We describe how to completely disable any SEV memory protection configured by the tenant. We implement a replay attack that uses captured login data to gain access to the target system by solely exploiting resource management features of a hypervisor." AMD is scheduled to ship SEV with the Zen processor line in the first quarter of 2017. http://hothardware.com/news/amd-to-attack-performance-desktop-market-with-ry... http://hothardware.com/reviews/amd-unveils-additional-zen-processor-details-... http://hothardware.com/news/cern-engineer-leaks-amd-zen-architecture-details... AMD has disclosed that one of the high-end options in the initial RYZEN line-up will feature 8 cores (16 threads with SMT) and at minimum a 3.4 GHz base clock, with higher turbo frequencies. That processor will also be outfitted with 20MB of cache -- 4MB of L2 and 16MB of L3 -- and it will be infused with what AMD is calling SenseMI technology. SenseMI is essentially fancy branding for the updated branch predictor, prefetcher, and power and control logic in Zen. AMD's upcoming AM4 platform for RYZEN will be outfitted with all of the features expected of a modern PC enthusiast platform. AM4 motherboards will use DDR4 memory and feature PCIe Gen 3 connectivity, and support for USB 3.1 Gen 2, NVMe, and SATA Express. Performance demos of RYZEN shown to members of the press pit a stock Intel Core i7-6900K (3.2GHz base, 3.7GHz turbo) with Turbo Boost that was enabled on the 6900K, versus RYZEN with boost disabled running at 3.4GHz flat. In the demo, the RYZEN system outpaced the Core i7-6900K by a few seconds. AMD has been talking about the claimed 40% IPC (Instructions Per Clock) improvement of its forthcoming Zen processor versus the company's existing Excavator core for ages.AMD claims to have achieved that 40 percent IPC uplift with a newly-designed, higher-performance branch prediction and a micro-op cache for more efficient issuing of operations. The instruction schedule windows have been increased by 75% and issue-width and execution resources have been increased by 50%. The end result of these changes is higher single-threaded performance, through better instruction level parallelism. Zen's pre-fetcher is also vastly improved. There is 8MB of shared L3 cache on board now, a unified L2 cache for both instruction and data, and separate, low-latency L1 instruction and data caches. The new archicture offers up to 5x the cache bandwidth to the cores versus previous-gen offerings. However, after all the specsmanship was out of the way, AMD actually showcased a benchmark run of an 8-core Zen Summit Ridge procesor versus Intel's Broadwell-E 8-core chip, both running at 3GHz and processing a Blender rending workload. In the demo, the 8-core Zen CPU actually outpaced Intel's chip by a hair.